AI-Powered ASIC Design Goes Mainstream

Long gone are the days when all semiconductor chips were designed and manufactured by semiconductor foundries. Today’s chip customers can submit their own designs, and foundries can tape them out into custom, “application-specific ICs” (ASICs) specifically targeting unique applications.

The rapidly expanding EDA industry is tapping the cloud and AI/ML algorithms in chip design tools, to solve extremely challenging optimization scenarios of modern applications, and to relieve the traditional bottlenecks associated with chip and system design. Since 2021 big enterprises have moved to rolling their own custom chips – big companies like Apple, Amazon, Microsoft, Google, Facebook (Oculus), Tesla, Baidu, and more.

Synopsis AI-powered DSO tool simplifies custom ASIC designs

Modern EDA in the cloud is enabling these companies chip developers to offload the burden of mechanical tasks and manual errors as well as offer significant performance benefits, in some cases realizing a 10x run-time improvements compared with traditional on-premises environments. As Cloud EDA has grown and added advanced capabilities In February, Synopsys’ AI-powered DSO (design space optimization) tool reached 100 commercial tapeouts. Also last month Marvell became the latest chip company to make the move from on-premises to the cloud when they announced a move to AWS’s EDA in the cloud service to optimize chip developments and accelerate their time to market.

EDA Tools from vendors NVIDIA, Siemens, Synopsys, Cadence, Altair, and Google are increasingly using AI techniques in their newest tools and are seeing swift adoption. These offerings use AI to “analyze large amounts of data and provide insights that suggest design alternatives an engineer may not have considered before. This trend can enhance the value of IC designers in the industry by allowing them to focus on more complex and creative aspects of design and ultimately manage the exponential complexity and produce better products.

As complexity rises, the probability of first silicon success goes down. Wilson Research Survey data details the scenarios ultimately driving an exponential growth in design complexity that developers and designers are facing, that includes…
 • 58% of designs are 10M gates or greater
 • 52% of designs contain at least two processing cores
 • 34% of designs contain an AI accelerator
 • 80% of automotive designs contain security features
 • 86% of designs have active power management
…and all of this supports the larger data point that 76% of these ASICs will require two or more respins — a concerning trend, given rising fabrication costs.

Additionally Wilson Research study found that “With ASICs, 70% of the time is spent on functional verification. Only 24% achieve first-time silicon success, and only a third of the projects finish on time.” Additionally, the design bottleneck is equally sobering for field-programmable gate arrays (FPGAs), Siemens’s May, who noted from the research study, with only 16% of designs achieving zero bug escapes.

As great as ASICs are, they are costly to set up due to the need for high-end tooling and the fact that ASICs cannot be purchased individually. In fact it is “not uncommon for initial production runs for low-end ASICs to well exceed $10,000, only large businesses tend to benefit from ASIC services, such as Apple and Microsoft” – although newcomers like Tiny Tapeout are debuting solutions to bring custom chips to the masses and make it more affordable.

Electronic Design Automation (EDA) includes hardware, software, and services with the objective of assisting in the planning, implementing, validating, and manufacturing of semiconductor chips or devices. EDA helps reduce cost as well as time with regard to electric circuit designs as well as enable tighter integration into existing solutions so companies can reduce design costs and be better positioned to add services or make adjustments more efficiently in future designs. The global electronic design automation software market size was valued at USD 11.10 billion in 2022 and is projected to expand at a compound annual growth rate (CAGR) of 9.1% from 2023 to 2030 according to Grand View Research.